Mapping Uniform Loop Nests onto Distributed Memory Architectures
نویسنده
چکیده
This paper deals with scheduling, mapping and partitioning techniques for uniform loop nests. It is shown how the diierent techniques of scheduling, of mapping and of partitioning are linked and how code generation can be derived according to these methods. Our approach is based upon extensions of systolic array design methodologies.
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تاریخ انتشار 1993